Research Accelerator for Multiple Processors (RAMP)
Design and development of IEEE754-compliant double precision floating point units for Xilinx FPGAs and firmware for the SystemACE controller.
FPGAXilinxFloating PointIEEE754Firmware
2008–2009 Overview
The Research Accelerator for Multiple Processors (RAMP) project at UC Berkeley focused on developing FPGA-based hardware for computer architecture research. My contributions centered on floating-point unit design and embedded firmware development.
Key Contributions
IEEE754 Double Precision Floating Point Unit
- Designed and began developing a fully IEEE754-compliant double precision floating point unit
- Targeted for Xilinx Virtex-5 FPGAs
- Aimed to provide high-performance floating-point computation for research workloads
SystemACE Firmware
- Designed and developed firmware for the Xilinx SystemACE compact flash controller
- Enabled streamlined FPGA configuration and boot processes
Context
This project was part of my undergraduate research at UC Berkeley’s Berkeley Wireless Research Center (BWRC), where I worked on FPGA platforms that would later evolve into the BEE (Berkeley Emulation Engine) series of systems.